CompTIA Security+ Practice test – sample question 1
For CompTIA Security+ Certification Exam SY0-401
NOTE: These sample questions are examples of the types of questions you would be seeing on the Security+ exam and in CertBlaster but you would have to be in the software to experience the performance based questions. The CertBlaster test engine provides all the questions types you would see at the exam such as in-simulator questions, drag and drop, list and reorder etc.
Security+ Sample Question 1
Different data sources have inherently different degrees of preservation. In order to preserve the most fragile data first, an order of volatility must be established and then used. The table shows four different data sources. Order the list in order of volatility for these four data sources (1 is most volatile and 4 is least volatile).
|XXXXXXX||Random access memory (RAM)|
|XXXXXXX||Location of data Sequence to be retrieved Register, cache, peripheral memory|
The correct answer is at the very bottom of this page (to give you a chance to think about it first).
Volatile data is particularly challenging to capture. It has a short “shelf life” and accessing the information at the lower level can compromise the data at higher levels. If you were to execute a command you wanted to recover from a running process it could destroy the current contents of the registers and RAM. The best solution to capturing volatile information would be by capturing the system image.
Security+ Exam Objective addressed in above question:
Main Domain 2.0 Compliance and Operational Security – Sub-objective 2.8 Summarize risk management best practices.
For a complete practice tests series with in excess of 400 questions including in-simulator and other performance based questions see our Security+ practice test with four full exam simulations, one drill per CompTIA main domain and a total in excess of 400 practice questions, answers and explanations.
The correct answer to above question is as below:
|2||Random access memory (RAM)|
|1||Location of data Sequence to be retrieved Register, cache, peripheral memory|